WinUAE 4.9.2 Serie Beta

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WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » dom ott 02, 2022 9:39 pm

Immagine


"Aggiornamento WinUAE 4.9.2 Beta 7"


Autore: Toni Wilen


WinUAE 4.9.2 Beta 6 32Bit
http://download.abime.net/winuae/files/ ... _4990b7.7z

WinUAE 4.9.2 Beta 5 64Bit
http://download.abime.net/winuae/files/ ... _4990b7.7z


WinUAE 4.9.2 Beta 1:

Inizia una nuova era per WinUAE, elencare tutte le migliorie e i progressi presenti e futuri non è semplice farlo in poche parole, in allegato la citazione ufficiale di Toni Wilen.

Dopo qualche test posso dirvi che la Potenza in RTG ora è notevole, UAE-GFX e tutte le funzioni di Picasso96 sono ora completamente "con accelerazione hardware" (usa il codice nativo lato host), questo significa che i video anche di risoluzione elevata saranno fluidi, come anche i Giochi RTG.

Se prima nessuna Scheda Espansione anche le più potenti non potevano eguagliare la potenza di WinUAE, adesso saranno ancora più lontane, inoltre le nuove funzionalità di UAE-GFX Picasso96 ora sono opzionali (tutte abilitate per impostazione predefinita), solo file di configurazione.

Altra grande novità sui KickStart, ora WinUAE riconoscerà e saranno disponibili nel SyStem ROM Setting anche i nuovi KickStart 3.1.4, 3.2 e 3.2.1.

Novità e miglioramenti anche per l aVRAM della scheda RTG, Gestore di eccezioni diretto JIT semplificato.

Aggiornamento CyberStorm MK I: Accelerator e SCSI sono stati divisi, Il modulo CyberSCSI è ora una scheda di espansione e ha un'immagine ROM separata (funziona in modo simile al kit Blizzard SCSI).


Recensione Toni Wilen:
- Added "Ultra extreme debug" overscan mode. Complete raster is fully visible, horizontal and vertical blanking disabled (including borderblank). COLOR0 changes are always visible.
- CPU chipset bus access cycle allocation was not fully accurate. Basically addressing part of cycle and data transfer part of cycle was swapped. Has been wrong since CE mode was introduced. Fixes for example Batman the Caped Crusader. (Single cycle difference was all that was needed to fix it..). This can break some older state files.
- 68000 STOP emulation rewritten, cycle usage and interrupt start timing is fully cycle accurate now.
- If all bitplane start conditions were active except vertical DIWSTRT and DIWSTRT was written later with vertical value == current vertical, bitplane DMA started immediately but there should be 2 cycle delay. If bitplane DMA was disabled but all other conditions were already active and then DMACON was written to enable BPL DMA: DMA started 1-2 cycles too late.
- If (quite short) bitplane DMA ends before all sprite slots have been processed, remaining sprite slots can still work normally (sprites are only inhibited when internal bitplane activity signal is active). This can also trigger very nasty (previously unknown?) chipset bug: when last bitplane DMA fetch happens, sprite DMA is not anymore inhibited by bitplane DMA (sort of off-by-one bug) and if same slot has active sprite, it will conflict with bitplane DMA. It can cause unexpected DMA write to another custom register (instead of BPLxDAT), possible range is from 0x100 to 0x11E. For example if it happens to be BPLCON0 (0x100), display can get corrupted or monitor can lose sync (or shows "No signal" message) if ERSY bit gets set. (Guess how this bug was found.. It was quite confusing when very innocent looking test program suddenly caused display to lose sync only on real hardware). This is now accurately emulated and DMA debugger will log conflicts.
- Bitplane refresh slot conflicts are accurately emulated (see below)
- Added monitor sync method configuration. Default is "Combined" (matches previous UAE versions that basically combines both modes), C-Sync: use composite sync signal as sync source, HV-Sync: use separate horizontal and vertical sync signals (VGA). Some programmed modes can have differences between sync modes or only work in HV sync mode or only in C sync mode in real world. For example ECS Denise can't generate both valid C-sync and programmed horizontal blanking simultaneously. AGA does not have this limitation.
- Emulated display is now blanked if programmed display mode settings are impossible (real display would lose sync, become blanked or show "no signal"), for example really too short or really too long sync pulses, BPLCON0 ERSY set without genlock, BEAMCON0 BLANKEN or CSYTRUE and CSYNC monitor setting selected etc.. If old statefile is loaded with ERSY set without genlock: enable genlock to prevent unexpected blank screen.
- Optional display resync blank screen added to Display panel. (Simulates "modern" display mode resync delay). If not enabled, OSD FPS counter will temporarily show "---"
- DMA debugger had wrong address shown for second copper WAIT/SKIP cycle. (was same as previous read cycle)
- Hires resolution and hires BPLCON1 bit set (or shres and shres BPLCON1 bit): single pixel horizontal offset may have appeared in right side of screen. AGA and non-subpixel mode only. (Skidmarks II in hires mode)
- RTC is automatically enabled if chipset extra=<model without RTC> and system has fast ram, slow ram or chip ram expansion.
- Higher 68000/010 integer clock multipliers (4x+) in CE mode: chipset access timing was not accurate.
- A1000 Denise bug emulated: sprites end horizontally 1 lores pixel later than bitplane horizontal window end. Currently enabled when A1000 Agnus is selected.
- Replaced internal 32-bit cycle counter with 64-bit counter, simplifies internal logic because annoying counter wrap around handling is not needed anymore.
- Playfield to playfield collision (full collision) only worked when same line had at least one active sprite. (4.9.0)
- Sprite to playfield collisions didn't work correctly (4.9.0)
- Horizontal blanking was missing if programmed screen mode was active without programmed horizontal blanking (hardwired blanking should have been active)
- CIA emulation refactored, fully cycle-accurate now. See below.
- Max allowed programmed mode non-interlaced vertical line count is now 800 (from 592), special 700+ line programmed modes are possible and compatible with real SVGA monitors.
- Statefile restore didn't restore static BPLxDAT values correctly (only affects OCS/ECS programs that use "7-plane" mode and only update BPLxDATs at startup). (broke in 4.1.0)
- Copper zero cycle special cases updated, odd/even line length difference emulated. Copper list that "overflows" to beginning of next frame special case timing emulated, if copper has pending DMA request when COPJMP happens, COPJMP startup gets delayed by 1 copper cycle. Previously copper state was reset at cycle 0 and delayed start was queued which is not correct because first line's cycles 0 and 2 are still normally available for previous frame's copper list.
- Blitter startup sometimes had extra idle cycle (4.9.0)
- Blitter line mode with blit width != 2 is now accurately emulated and draws correct strange looking "lines" (previously it didn't do anything or line was normal looking)
- Blitter interrupt started 1 cycle too late. (+1 was added long time ago becase it fixes one demo but actual bug was following INTREQ register handling)
- If Paula internally sets INTREQ bit (not by writing to INTREQ with CPU or Copper): IPL line changes 1 CCK earlier, before INTREQR read returns new bit set.
- Starting emulation or loading statefile before emulation has been started: vblank state variables was not initialized correctly, first field enabled sprite DMA too early. (4.9.0 or .1). Hardreset started was not exactly same as initial boot, CPU started few cycles later if hard reset.
- Mid screen resolution changes are now pixel perfect (AGA fully implemented, OCS and ECS Denise only partially correct)
- Save MSM6242B RTC model control registers to RTC file if they are modified. Previously only RF5C01A control registers (and NVRAM) was saved.
- Serial port interrupts and SERDATR are now cycle-accurate. (Only if CPU memory cycle exact enabled)
- Serial port transmit interrupts and SERDATR transmit related bits are now emulated even when serial port = none.
- Serial port optional loopback mode added. TX->RX. RTS->CTS. DTR->DSR+CD. This is also cycle-accurate (for cputester IPL timing testing without extra hardware, only need TX to RX jumper wire)
- Second 1M extended ROM bank is now internally split to two 512k banks. Non-aligned bank start and size caused problems in some configs.
- uaegfx Picasso96 v3.0+ mixed mode screen dragging is enabled by default. 4.9.1 required "-p96test 1" command line parameter.
- 4.9.1 uaegfx Picasso96 screen dragging without ""-p96test 1" command line parameter crashed emulated Amiga.
- uaegfx new Picasso96 features are now optional (all enabled by default). Config file only.
- uaegfx all Picasso96 functions are now fully "hardware accelerated" (uses host side native code), excluding line draw. Previously some functions only supported common minterms/mask operations, unsupported operations were handled by Picasso96 software. Minterms that read and invert destination do not anymore invert unused/alpha bits if mode has them (15bit/32bit). Always use RGBFormat parameter in D7 if available, instead of RenderInfo RGBFormat variable.
- Chipset programmed display modes (again) use horizontal blanking timing to calculate display positioning. It has been confirmed that at least some early/mid 1990s multisync SVGA monitors (for example Microvitec 1438) do also use blanking timing to calculate display size and position instead of only relying on hsync/vsync timing.
- Hardware emulated RTG boards that have physically swapped red and blue output (Spectrum, Piccolo, Piccolo SD64) had wrong colors in 24/32-bit modes.
- Piccolo Z3 and Piccolo SD64 Z3 had wrong autoconfig board logical size (which crashed the driver).
- If hardware emulated RTG board VRAM was immediately (no gap in address space) after any RAM/ROM region and JIT direct was enabled: first 4096 bytes (host CPU page size) of VRAM was not fully JIT direct compatible and any direct read or write to first 4096 bytes would not access VRAM correctly, causing unexpected graphics glitches.
- Simplified JIT direct exception handler, win32 exception context structure can be used to directly read and modify any host CPU registers, there is no need for trampolines and self modifying code.
- Chip RAM and Slow RAM initial power up pattern emulation is enabled by default (checkbox in advanced chipset). Now matches my real hardware (A500 OCS/A500 ECS/A1200) but modified configurations like ECS Agnus in rev5 (or older) mainboard don't create correct patterns. Random set/cleared bits are not generated, only all ones/all zeros repeating pattern. Pattern depends on ram chip type and manufacturer. Other chips can have different patterns.
- Disk data read returned random data even when no drive was selected (should return zeros only). Fixes corruption in original Nitro Psygnosis screen. Also fixed another related bug when no selected drives and disk sync matches side-effect that caused Juke Box 2 / Dreamdealers to hang at boot.

- Switched to Visual Studio 2022.
- Larger default GUI size and slightly larger font if Windows desktop is large enough (at least 1600*1024)
- Finally removed huge amounts of compilation warnings (excluding PCem).
- Quickstart panel initial UI element is now DF0: image selection button. Too many accidental Amiga model changes..
- DirectDraw support removed, added GDI (win32 basic GDI API) support. Function differences: exclusive fullscreen is not supported (switches to D3D11/9 if attempted), all basic scaling modes and uaegfx hardware cursor supported.
- Box art window screen shot rightmost pixel column and bottom pixel row was not visible.
- Crash dump dialog close button usually didn't do anything.
- ROM scanner dialog didn't use correct GUI size and fonts.
- CyberStorm MK I update: Accelerator and SCSI has been split. CyberSCSI module is now expansion board and has separate ROM image (works similar to Blizzard SCSI Kit). Main ROM should be only configured if CPU is 68060 because it will crash if CPU is 68040, it is only needed to disable 68060 FPU. Real CSMK1 had empty ROM socket(s) if installed CPU was 68040.
- Visual DMA debugger shows conflicting cycles as blinking red pixels.
- DMA debugger (both console and visual) better support for variable/toggling horizontal and vertical line counts.
- It was not possible to enter debugger anymore if CPU was stuck in stopped state after entering and exiting the debugger once.
- Added OR, AND and XOR operators to debugger calculator (|, &, ^)
- Debugger v command does not anymore crash if hpos or vpos is out of range.
- Debugger v command now (at least temporarily) shows Chip RAM row and column (RAS and CAS) addressing values. Very important for REFPTR and refresh/bitplane conflict behavior.
- Debugger sp command parsed attached sprites incorrectly (since the beginning).
- Changed CTRL+F12 fullscreen/windowed switch: If already switched from full-window to window. Next CTRL+F12 will return back to full-window, not fullscreen.
- Quickstart panel floppy bootblock check used current track of drive (not track 0). Broken when FloppyBridge support was added.
- Reset FloppyBridge state when changing floppy drive type to/from FB drive type to some other drive type. Fixes uae-configuration on the fly floppy drive type change to/from FB.
- Memwatch break point that crossed 64k "bank" didn't map last 64k "bank" if it was only partially needed.
- Self modifying code (smc) debugger feature now clears detected modifications if 68020+ instruction cache is flushed.
- Do not add CPU instruction history entries when CPU is stopped.
- Horizontal and vertical position is now included in debugger history output (H/HH)
- Added CPU STOP state information to DMA debugger (| = STOP idle cycle, + = STOP idle cycle and higher IPL detected = STOP ending soon)
- DMA debugger decimal horizontal cycle counter value removed, replaced with current IPL (interrupt level) line state.
- DMA debugger shows CPU opcodes in basic form ("NOP", "MOVE" etc), vertically. It looks a bit weird but didn't have better ideas..
- Advanced chipset CD32 NVRAM or C2P without CD32 CD was not fully supported.
- CD32/CDTV Quickstart mode "remembered" previous DF0: setting and didn't disable it by default (even if Quickstart panel showed it as disabled)
- CD32/CDTV Quickstart panel DF0: was not possible to select/enable.
- uaegfx automatic integer scaling supported (chooses max fully visible integer scaling multiplier), manual filter panel horizontal/vertical multipliers supported.
- END+F9 monitor switching is not anymore hardwired and can be changed using input panel. (END+F9 debug colors when in lagless vsync mode is still hardwired)
- CD audio is now always mixed with Paula audio. Separate CD audio output support removed.
- CD audio was not resumed if WinUAE was unminimized and minimize was configured to pause emulation.
- Z2 RAM configuration was unreliable. (4.9.0)
- Some American Laser Games didn't have ROM descrambling support. Added missing ROM variants.
- Added American Laser Games Quickstart support.
- If Quickstart ROM based Arcade hardware config (Arcadia or ALG) is selected, NVRAM file name is automatically set to ROM name. Genlock video file path is also set if ALG ROM is selected. Config files are not affected.
- Added all 3.1.4+ official KS ROMs to ROM scanner.
- ROM file list sorting changed, added grouping, sort by group priority first (KS ROMs, extended KS ROMs, freezer ROMs etc..), then alphabetically.
- Integer scaling had scaling artifacts that depended on window size and other variables. (Old bug)
- Added NVRAM path to Paths panel. (Arcade/CD32/CDTV hardware NVRAM files default to this path)
- Sometimes old graphics was temporarily visible in RTG modes if RTG had visible black borders (depends on scaling mode) and screen was switched and new screen had larger size/resolution.
- CTRL+C in console window does not anymore close WinUAE. (CTRL+C in newer Windows versions can work as a Copy operation)
- Added video recording file select inputevent. This also starts recording if file was selected.
- Window border FPS counter value has "R" appended if recording is active.
- Creating directory filesystem soft link didn't work (returned "object not found") in relative path mode (Windows needs absolute path when creating shortcut files)
- Directory filesystem soft links only resolved if directory containing link was listed first or if softlink was created in same session (softlink was "cached" by filesystem emulation).
- Added "Slow" flag to RAM panel. If set, selected memory bank has Chip RAM timing but is not Chip RAM capable. Advanced chipset panel "C00000 is Fast RAM" removed, it is not needed anymore. (Only affects CPU speed in cycle exact modes)
- ECS Denise Genlock features can be enabled manually: genlock_effects=<number of color palette indexes that become transparent> or p<number of bitplanes that becomes transparent if bit set>. "brdntran" can be used to force enable BPLCON2 BRDNTRAN bit, "brdrblnk" to force enable BPLCON2 BRDRBLNK bit. Separated by comma. (for example "genlock_effects=3,15,p7")
- Genlock sprite color selection bug fix.
- Genlock ECS Denise BPLCON2 BRDNTRAN emulation fixed. Not real HW tested but I think it is supposed to make border look normal even if color 0 is genlock transparent.
- Genlock ZCLKEN BPLCON3 bit emulated, if set, genlock transparency video out pin (PIXELSW) starts outputting 14MHz pixel clock. Emulation creates alternating hires pixel size toggling transparency if enabled and genlock is configured. (Which probably is what happens in real world too when genlock is connected. Originally it probably was supposed to be pixel sync signal for external video devices)
- Added Output panel optional 256 color palette indexed png screenshot support. If screenshot has more than 256 unique colors, 24-bit png is created like previously. It also tries to keep original palette order: first screenshot's unique colors are collected, then custom color register values are collected (values at the end of previous field), screenshot colors are matched with custom colors, if match found, color is marked as allocated. Then all remaining colors (copper color changes, EHB, HAM, on screen leds, blanking black etc..) are added to palette. If total is more than 256, 24-bit png is created. 256 color mode also tries to preserve first 32 color palette entries. (Preserved = color is not overwritten by another color even if color is not used in screenshot)
- Optional IFF screenshot support (-screenshotiff or screenshot_mode=2 registry/ini). IFF mode does not attempt to preserve first 32 color palette entries to keep image depth as small as possible. IFF is not (yet) compressed.
- Debugger 's' and 'W' quoting support improved, for example "W xxx "ab'c" works as expected.


CIA updates:

- Major rewrite, code duplication removed.
- Cycle-accurate (timers were cycle-accurate previously but not much else), CIA bugs/"features" emulated. Most of these have been inherited from 6526.
- CIA E-clock counting and CPU to E-clock synchronization rewritten.
- CIA-B TOD increment horizontal position calculation was broken, CIA-B TOD was incremented too early horizontally and could increase TOD twice if TOD was also modified in same line or line's TOD increment might have been missed completely. More compatible/CE only.
- CIA TOD internal increment by 1 is weird, TOD incremented value can be only updated every 4th E-clock (I guess full timer update is internally spread to 4 cycles). This also affects alarm interrupt timing.
- CIA-A TOD increment position is now cycle-accurate, including above every 4th E-clock behavior.
- CIA CPU access E-clock sync updated to include delay caused by VPA/VMA signals.
- CIA interrupts are delayed by 1 E-clock.
- Many undocumented special cases emulated, for example timer latch values 0 and 1 work unexpectedly (not very surprising, zero timer value probably wasn't designed to be used..).
- If CIA timer was started by writing to TxHI (ONESHOT mode) with timer previously loaded with value==0: interrupt is generated 1 cycle earlier than normally.
- CIA B-timer counting A-timer underflows: B-timer counts down 2 cycles after A had underflowed. Was immediate previously.
- Added E-clock phase (0 to 4) config file entry. Real 68000 E-clock phase relative to CPU clock is random, decided when system is powered up. At least my real A500 rarely powers up in E-clock phase=0 state (which UAE uses by default). Usually it seems to be 2 or 3. Phase can be detected in software using some tricks but no normal program cares.
- Word read from CIA-B space now returns correct register contents in upper byte. Previously it returned register content OR'd with previous bus data.
- CIA accesses added to DMA debugger (new line)
- Debugger CIA register dump current timer values were not necessary actual current values but values when any CIA register was last accessed.
- CIA E-clock cycle option added, A500 (68000 generates E-clock timing) has slightly different E-clock timing than A600 (Gayle generates E-clock). Option added to Advanced chipset. No normal program cares but this difference can be detected by software. Main difference is that Gayle generated E-clock is 2 CPU clocks longer than 68000 internal generated E-clock which makes it impossible to do back to back CIA accesses if Gayle based Amiga.
- Most special case are only emulated if CPU is more compatible and not fastest possible.


Refresh slot conflict details:

- Main discovery was hidden internal DMA refresh pointer ("RDMAPT"). REFPTR can be written to modify it (not 1:1 because REFPTR is only 16 bits, few low bits affect multiple RDMAPT bits).
- OCS has very different RDMAPT to RAS/CAS mapping than other chipsets. ECS 1M, ECS 2M and AGA have only small differences. Currently there is no separate 1M/2M Agnus selection, 2M Agnus is selected if Chip RAM size is larger than 1M and not AGA. This is not important because it only affects refresh conflict side-effects.

When bitplane DMA conflicts with refresh slot:
- Both RDMAPT and BPLxPT gets modified: Temp PT = RDMAPT OR BPLxPT. TPT is increased by 2 (if OCS) or $200 (if ECS). This increases Chip RAM RAS addressing value by one which is used for Chip DRAM refresh (RAS only refresh. AGA uses CBR refresh and RDMAPT increment has been removed). This overrides normal BPTxPT increase by 2. If BPL modulo is added, modulo is OR'd with refresh $2/$200 value, then modified modulo is added to TPT. Finally TPT is copied back to RDMAPT and BPLxPT. This explains graphics corruption but is not the only reason.
- DMA target address becomes BPLxDAT AND refresh slot address. First refresh slot: strobe address AND BPLxDAT which always results in read-only register so nothing special happens. Denise also does not see this BPLxDAT write which can make a visible difference if it was originally BPL1DAT. If later refresh slot (and not ECS and not NTSC long line which uses second refresh slot for STRLONG strobe): 0x1FE AND BPLxDAT = always original BPLxDAT.
- Because horizontal strobe register address gets corrupted, Denise does not know where horizontal start is located. Horizontal strobe normally resets Denise/Lisa internal horizontal counter.
- Paula also does not see horizontal strobe: disk and audio DMA requests are not sent to Agnus during conflict lines, this causes audio glitches. (and failed disk read/writes)

Missing horizontal strobe causes Denise's internal 9-bit horizontal counter to free-run which adds "random" offset to every horizontal decision inside Denise:
- DIW (DIWSTRT/STOP/HIGH). Visually this causes full horizontal overscan with unusual border color stripe pattern that repeats every 7 lines.
- Bitplane horizontal BPLCON1 positioning becomes jagged.
- Sprite horizontal position. Sprites become horizontal stripes and same stripe can appear twice/scanline.
- Horizontal blanking. This can cause display device to see non-black color in horizontal or vertical blanking region (if COLOR0 is not black), confusing black level detection. Usual side-effect is line becoming darker than other lines or have pulsing brightness or weird colors (if COLOR0 RGB components have different values). This is not (yet) emulated.

Example programs that have refresh bitplane DMA conflicts if ECS Agnus:

http://janeway.exotica.org.uk/release.php?id=6029 (Only single conflict)
http://janeway.exotica.org.uk/release.php?id=2219 (Multiple conflict lines)
http://janeway.exotica.org.uk/release.php?id=19588 (Whole visible display! Everything!)

Note that glitches can change depending on unused memory contents, memory config and chipset model.
WARNING: last 2 have very glitchy music because Paula can't send new audio DMA requests to Agnus if first refresh cycle conflicts.

TODO:

68000 IPL testing and fixing. Tester working using TX to RX serial loop back (No more need for external hardware). Tester and emulation updates should be finally done, instruction testing will start soon.
Pixel perfect (including chip model specific "artifacts") OCS Denise and ECS Denise mid screen horizontal resolution change.

Thanks to ross again for Display/CIA/Serial tests that require extreme cycle-accuracy to work correctly
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Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » mer ott 05, 2022 10:56 pm

Arrivato il fix di Toni per questa nuova versione, ora AROS One 68k funziona perfettamente, direi una grafica molto più veloce e anche più fluida, anche SDL funziona bene, vedi screnshot (NetSurf SDL)
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Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » ven ott 14, 2022 6:33 pm

WinUAE 4.9.2 Beta 2:

- Display resync blanking was stuck enabled (~1s blank screen when mode switches)
- Internal emulated serial devices (for example laserdisc player) data transfer was unstable.
- Z3 hardware emulated RTG board autoconfig size data was fixed and then was broken again.
- Some NCR710+ SCSI controllers hung.
- Serial port status bits were not correct in all CPU modes.
- Internal CPU instruction emulation table refactoring, use separate table for instructions that return total cycles and instruction that count cycles internally (cycle-exact modes).
- Quickstart panel floppy type dialog was partially clipped if GUI was using smaller default size.
- D3D9 full install was accidentally required (d3dcompiler_47.dll error message).
- Automatic fall back to GDI mode (if both D3D11 and D3D9 is not available) retried forever.

Pre-4.9.2 fixes:

- Box art path detection didn't parse cdimage0 paths correctly if path had "," character. ("," needs special case because path can be optionally followed by ",delay")
- If only one autoconfig device was enabled and it was removed when emulator was running and then system was hard reset: old autoconfig data was not cleared causing disabled device to get misdetected by AmigaOS which usually caused hang.
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

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Amiga 1200/030 Ram 16 Mega HD 500 MB
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » lun ott 24, 2022 5:13 pm

WinUAE 4.9.2 Beta 3:

- 68000 IPL check position is now almost fully accurate (Still some special cases to check and test). Very big thanks to fx68k author!
- W debugger command hang fixed.
- Full drive/RDB mode is now normal checbox. Hopefully it is now less confusing than button that didn't really look like a button. If selected HDF already has RDSK identifer, checkbox is ticked and disabled. Checkbox can be only ticked/unticked if selected HDF does not have RDSK identifier.
- GDI mode didn't force 32-bit screen depth mode.
- FloppyBridge uae-configuration change now really updates all internal variables.
- Screenshots didn't work if 256 color checkbox was not ticked (tried to create 24-bit palette indexed image)
- DMACONR blitter status 1 cycle delay was broken (Circle scroller / UFO)
- Enabling DMA debugger and then returning to emulator continuously reported conflicts until next frame had finished. DMA debugger init was changed but tables were not fully initialized.
- Keyboard reset now behaves more like real hardware. Press keys, hardware gets reset (if keyboard reset warning is not active), reset continues only when at least 1 key is released. If all keys are kept pressed more than 5 seconds: do hard reset.
- DMA debugger CIA access line includes also E-clock state (0, 2, <data access info>, 6, 8) and any "wasted" cycles needed to sync with E-clock are marked with "-".
- DMA debugger is wider. More space for future features.
- New cputester tests done, for example all SR modification instructions (including STOP) tested with both trace + pending interrupt. No errors found.
- If STOP was executed without trace active and STOP enabled trace, STOP still stops normally and only interrupt can wake it up. (b1)
- Blitter busy bit read incorrectly as blit not busy if blitter was in non-nasty mode and not line mode and CPU stole second to last D channel slot.
- Removed all remaining Windows 7/Vista checks (from days when XP and Vista was still supported).
- "Remove interlace artifacts" is broken. Will be fixed later.
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

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Amiga 1200/030 Ram 16 Mega HD 500 MB
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Amiga 500 Plus Doppio Kickstart 204-1.3
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » mar nov 01, 2022 1:38 pm

WinUAE 4.9.2 Beta 4: (News aggiornata 01/11/2022 )

- Remaining IPL fixes (LINK, UNLK, MOVE to SR/CCR, AND/EOR/OR SR/CCR, CPU wait state IPL fix).
- Emulated Paula side-effect that affects IPL timing. IPLx line state changes from low to high (IPL is active low) are about 0.5 CCK later than high to low transitions. This delays CPU IPL change detection by 2 CPU clocks if any IPL line had low to high transition. CPU accepts IPL change only if has been stable for 2 CPU clocks. (for example 3 to 5 has delay, 4 to 5 does not)
- Enable only WASAPI audio by default.
- Debugger break point command accepts number of hits before breaking to debugger (f Nxx <address> where xx is number of hits required)
- uaegfx overlay limit checks compared Amiga side VRAM end against physical host side bitmap end which accidentally passed if 64-bit Windows. Overlay window was usually empty if 32-bit Windows. (It might have worked in some configurations when using Z2 uaegfx)
- GUI Help button is now always available and opens if exists: (in priority order) winuae.chm, winuae.pdf. If neither is found, help web page is opened (without asking first like previously)
- It is still possible to run windowed WinUAE if desktop is 16-bit but it can cause graphics problems. Not sure if this needs to be supported anymore.

68000 based A500 like unexpanded (Fast RAM expansion is supported) configurations should be now 100% cycle-accurate. (If there are no bugs, many edge cases need complex and very carefully timed cycle accurate tests that are not easy to do)

Note that this does not mean all features are fully emulated, for example OCS and ECS Denise mid-screen resolution changes are not pixel accurate. Accurate as in if resolution change is not carefully coded, there can be few extra or missing pixels when resolution changes. AGA does not have this side-effect.
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
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Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » dom nov 06, 2022 8:00 pm

WinUAE 4.9.2 Beta 5: (News aggiornata 06/11/2022)

- If copper used last cycle in scanline and last cycle was even cycle (PAL 226) and it wanted next possible copper cycle and it was free: copper will allocate cycle 1 (Copper won't use it, neither can CPU or blitter. Cycle is allocated because it is 2 cycles from 226 but it is unusable because it isn't even cycle) and cycle 2 (copper uses this normally) of next scanline. This was implemented before 4.9 but was lost when custom emulation cycle allocation rewrite was done.
- Reading from non-existing register always returned FFFF instead of data that previous cycle's possible DMA access transferred. (Equipose / Complex hang)
- Don't keep "interrupt active" flag set if IPL is >0 but CPU interrupt mask is higher or same as current interrupt level. Only check it if mask gets lowered. Prevents unnecessary status flag checks between each emulated instruction.
- Fill color palette entries with pseudo-random contents at power up. (Except COLOR0 to not get annoying color flash at startup. Which does randomly happen on real HW.)
- EHB mode OCS/ECS vs AGA difference emulated. OCS/ECS number of active plane does not affect EHB (only HAM, DPF or KILLEHB disables EHB). For example if plane count changes mid scanline from 6 to 5, EHB stays active and remaining data in plane 6's shifters still appear as EHB plane. But on AGA plane count change causes switch to normal color mode immediately, plane 6's remaining data selects color palette entries 32 to 63. (G.Rowdy / Desire)
- In some situations if same scan line enabled and disabled EHB, whole scan line was drawn without EHB. (G.Rowdy / Desire)
- Replaced C-library pseudo-random number generator with simple xorshift algorithm.
- Ultra extreme overscan mode screenshot was vertically clipped.
- Remove interlace artifacts option fixed. (b1)
- Added optional chipset interlace mode filter panel settings. If enabled and at least one entry is different than normal native mode filter panel, filter is selected when current native is interlaced and switched back to normal native filter when mode switches back to non-interlaced.
- Added semaphore locking to A2065 emulation, previously it was possible to free A2065 resources while some other thread (for example slirp) was currently accessing its on-board RAM.
- Fixed serial port MIDI emulation hang.
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda schiumacal » mar nov 08, 2022 12:31 pm

Buongiorno a tutti del gruppo.

Ultimamente stò avendo problemi con WinUAE ultime versioni. Mi spiego meglio...

Ovviamente utilizzo l'emulatore per lavoro personale, quindi assolutamente necessario per il mio impiego. Sono, però, rimasto fermo da un pò di tempo alla versione 4.4.0 perchè è l'ultima con cui riesco a vedere tutte le ROM che mi servono, sopratutto per l'uso quasi quotidiano di AmigaOS 4.1 FE.

Infatti con questa versione di WinUAE, dopo una scansione delle ROM, riesco tranquillamente a vedere la "cyberstormppc.rom" e la "Picasso_IV_flash.rom" che sono le ROM che utilizzo regolarmente per l'uso di Amiga in emulazione.
Purtroppo appena provo a cambiare versione di WinUAE con una più aggiornata, nonostante rifaccio più volte la scansione delle ROM, i driver di cui sopra non vengono più rilevati, e non solo... molte altre ROM che provo a montare non vengono rilevate, cosa che invece non accade con la versione di WinUAE 4.4.0.

Sbaglio io qualcosa sicuramente, ma non capisco cosa...
qualcuno sa aiutarmi ?
Un giorno o l'altro risolverò equazioni di grado superiore a cinque.

http://www.schiumacal.altervista.org/
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » mar nov 08, 2022 4:15 pm

WinUAE 4.9.2 praticamente è una sorta di riscrittura di WinuAE dove molte cose sono cambiatre, dove tutto è molto più veloce e funzionale.

Come tutte le innovazioni inizialmente si perde sempre qualche compatibilità, che con le nuove beta e sopratutto con le segnalazioni degli utenti vengono fixati da Toni.

Adesso non so quale versione tu abbia provato, inizialmente ci sono stati problemi con OS 4.1 e AROS 68k, dopo una mia segnalazione Toni ha fixato.

Nelle ultime beta posso confermare che l'emulazione OS4.1 e AROS 68x funzionano molto bene, direi meglio visto che adesso molte emulazioni sfruttano direttamente l'hardware del PC, quindi molta più velocità e qualità.

Ormai versioni 4.4.0 e 4.4.1 appartengono al passato e a una vecchia tecnologia se così possimo chiamarla.

Il mio consiglio è di creare un nuovo config quando si passa da una versione più vecchia ad una più nuova, questo perchè nel config potrebbero esserci nuove voci o l'eliminazione di altre voci non più necessarie.

Eventualmente allega il tuo Config WinUAE in modo che io possa esaminarlo !
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » dom nov 20, 2022 12:52 pm

WinUAE 4.9.2 Beta 6: (News aggiornata 19/11/2022)

- Interlace mode filter crash fix (b5).
- Disk read DMA started (without DSKSYNC) and reading "nothing" (no drives connected): disk DMA never finished. (CDTV boot hang without DF0:)
- CIA B timer counting timer A underflows or CNT: generated interrupt was 1 timer count too early.
- 68060 without FPU and executing FPU instruction that uses -(an) or (an)+ addressing mode: address register's original value was restored twice when F-line exception stack frame was being created. Second time it used invalid register value causing D7 to be modified.
- Audio interrupts and AUDxDAT processing delays fixed. They were too long (2 CCK) when correct delay is only 1 CCK. 2 CCK appeared to be correct because previously interrupt timing was wrong.
- Keep CPU halted when keyboard reset keys are kept pressed. (b3 reset change update)
- EHB mode was unreliable in AGA mode (b5)
- 68010+ BKPT illegal instruction exception had stacked PC pointing to next instruction but it should point to BKPT.
- 68010 DIVU overflow condition undefined N flag behavior updated. (DIVS overflow undefined flags are still not fully correct)
- Copper/blitter bug tested, updated and confirmed and is enabled by default again (only if 68000 and cycle-exact). This is the infamous chipset bug that can cause copper pointer to blitter pointer copy if copper was waiting, CPU wrote to COPJMPx during odd cycle and blitter was active. Not 100% accurate (modulos are not added correctly when glitch happens) in line mode because line mode internal "micro-operations" are not fully correct (exactly when pointers change, modulo is added etc, invisible operations that don't affect line mode output).
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda schiumacal » mer nov 30, 2022 3:54 pm

Finalmente ho risolto il problema delle ultime versioni di WinUAE con cui non riuscivo a leggere le ROM dei vari kickstart amiga e altro...

In effetti se con l'ultima versione di WinUAE eseguo un "RESCAN ROM" non vede niente, mentre con la versione di WinUAE 4.4.0 vedeva tutte le ROM che mi servivano.
Credo sia solo cambiato il modo di vedere le ROM con le ultime versioni di WinUAE. Se anche facendo un "RESCAN ROM" non le vede, l'emulazione Amiga parte lo stesso e tutto funziona a meraviglia senza alcun problema.
Quindi il problema non esisteva proprio, ero solo convinto che fosse un bug di WinUAE, m mi sbagliavo di grosso.

Ps.
A proposito, è già uscita la beta7 di WinUAE.
Già scaricata e perfettamente funzionante.
Un giorno o l'altro risolverò equazioni di grado superiore a cinque.

http://www.schiumacal.altervista.org/
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Re: WinUAE 4.9.2 Serie Beta

Messaggioda AMIGASYSTEM » mer nov 30, 2022 4:19 pm

Strano a me anche le versioni recenti leggono le Rom, quando si cambiano percorsi o simodificano i dati delle Rom o altro, oltre al "RESCAN ROM", bosogna cliccare prima su "Reset default" che memorizzerà i nuovi percorsi e "Clear disk History" che pulisce tutto cio che è in Ram.

Comunque attenzione le beta possono contenere bug, meglio avere di scorta anche l'eseguibile dell'ultima versione stable.

Aggiornata la news alla beta 7:

WinUAE 4.9.2 Beta 7: (News aggiornata 30/11/2022)

- When on the fly changing floppy type from FloppyBridge drive to normal or vice versa, disk change is now simulated automatically.
- floppyXprofile (x=drive number) config file entry can be used to change drive type on the fly using uae-configuration. Replaces floppyXtype which uses magic number parameters (it is still supported). Floppy type can be for example "35dd" or "35hd" or "floppybridge". (TODO: floppybridge:<parameters> support)
- CPU instruction prefetches are marked with "I" and data accesses with "D" in DMA debugger (for example "CPU-RWI")
- Do not allow JIT FPU option if no FPU is selected.
- If copper used last cycle of frame: following copper instruction (=very last instruction of copper before it restarts) was shown incorrectly in DMA debugger (visual bug only).
- Special empty copper cycles where copper allocates the cycle but leaves it unused are now marked with "C" in DMA debugger.
- Disk DMA write to nowhere (no drives selected) never finished. This (and reading which was fixed in b6) was working in older version, probably broke in b1.
- Disk DMA write DMA slots now have correct order (Read DMA: slots are filled from right to left, write DMA: filled from left to right).
- Floppy index sync (CIA-B flag) CIA interrupt bit was "sticky" in some situations. (b1)
- CHD CD audio sync fix. (Always use logical block access method)
- Some filter options still used non-interlace filter mode settings when interlace mode filter was active.
- D3D11 mode integer scaling artifacts fixed. (b1)
- D3D11 shader support code leaked ID3D11RenderTargetView, causing problems when shader or parameters were changed on the fly.
- Double clicking windowed mode window title bar always switched to fullscreen mode (should only switch if Shift pressed=Fullscreen or Control pressed=Fullwindow is pressed). Possibly Windows version dependant.
- DIWSTRT and DIWSTOP same vertical start and end was unreliable (James Pond 2 intro glitch)
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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