WinUAE v4.9.0 Beta 41 (RC2) 32/64 Bit

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WinUAE v4.9.0 Beta 41 (RC2) 32/64 Bit

Messaggioda AMIGASYSTEM » dom ago 29, 2021 8:07 pm




Autore: Toni Wilen

Aggiornata la news alla Beta 41 (RC2)


WinUAE: Nuova beta che fixa e aggiunge nuove funzioni, la versione finale è prevista a breve, in questa versione ritroviamo una nuova scheda video "Pixel64" (AteoBus), altra scheda RTG basata su Cirrus Logic che funziona solo i Driver delle versioni recenti di Picasso96, non funziona invece con i Driver che necessitano di ateobus.library, questo avverrà in futuro.


WinUAE v4.9.0 Beta 41 (RC2) 32/64 Bit : Download


Beta 31:
- Sprite right overscan fixes.
- Programmed mode adjustments. HSSTOP does not affect display position. HSSTRT - HSSTOP only needs to be long enough for display device to detect it. Note that WinUAE will accept invalid HSSTOP and other impossible in real world programmed modes, there is no validation against real world video signal standards.
- HBSTRT/STOP accuracy improved in really weird situations (like having multiple HBLANK regions in single scanline..). Undocumented special case emulated: if HBSTRT to HBSTOP is less than 1 lores pixel (4 shres pixels), 4-(HBSTOP-HBSTRT) shres pixels of bitplane is visible before COLOR0 starts. Subpixel mode required. Apparently switching border on takes 1 lores pixel. (HB is Denise/Lisa internal trigger for border on state)
- Bitplane to refresh strobe vs refresh-only slot conflict behavior fixed (Water intro / Acme, Vectors Again / Armada etc, glitches are now correct if ECS Agnus)
- Optimized bitplane allocation now works correctly in NTSC mode, needs 2 alternating buffers because line length alternates in NTSC.
- Writing to horizontal DIWSTRT/STOP just before it would match missed the check.
- DIWHIGH full AGA hires/shres positioning bit support.
- Line buffer size was not large enough to fit "extreme" overscan superhires mode.
- HCENTER 8/9 CCK horizontal blanking period emulated. HCENTER generates extra sync pulse when it matches and current line is vsync line and long field. This is normally invisible but it can be visible in (weird or badly configured) programmed modes. Visible result is small black box, about at the middle of last line(s), ECS Denise only. This is never visible on AGA because blanking is generated by Lisa using internal registers. ECS Denise uses CSYNC pin to detect blanking condition. OCS Denise does not have CSYNC pin and uses internal hardwired blanking only.
- Fixed wrong border color/black color in right border when horizontal centering was enabled. Probably also possible in some other situations.
- ECS Denise hires resolution sprite horizontal position bit works strangely if bitplane resolution is lores or hires: first pixel row of sprite becomes transparent. Horizontal bit only works correctly if bitplane resolution is superhires.
- Subpixel emulation mode + superhires had single shres pixel offset in horizontal hblank and borderblank positioning. This change also means borderblank/border bug can't be anymore visible without subpixel mode + superhires resolution.
- DMA debugger uses first refresh slot to show if line is vertical blanking (B), vertical sync (S) or vertical diw is open (=), second refresh slot is used for long field (F) and long line (L). These special slots are marked with '*' to not (too easily) confuse them with same symbols in other slots. Horizontal diw ('(' and ')'), programmed horizontal blanking ('[' and ']') and programmed horizontal sync ('{' and '}') are also marked.
- PCem v17 merge. Some SVGA updates, Voodoo 3 updates, x86 CPU updates. (Probably moving to 86box in the future, PCem is not updated anymore.)
- Misc panel statefile text box was empty (might be Windows version specific or something) even when loaded config had statefile configured.
- fs debugger command fixed, display emulation updates made it randomly inaccurate.
- Seems to run normally under Windows 11 insider build.

Beta 32:
- La soppressione HDIW potrebbe rimanere bloccata nello stato sempre attivo se VPOSW è stato scritto a metà schermo con valori fuori intervallo. (La schermata del titolo di Agony Psygnosis diventa completamente oscurata dal colore del bordo se ECS)
- Attendere 2 campi prima di aggiornare la schermata visibile dopo la modifica del parametro di visualizzazione. Nasconde i glitch nella parte inferiore dello schermo che possono apparire quando l'ultima riga visibile è effettivamente la riga 0 o superiore. L'output 3D diretto viene ancora aggiornato normalmente, l'unica differenza è che i dati provengono dal vecchio frame. La maggior parte dei display "reali" in questa situazione si spegne (CRT) o si spegne temporaneamente (LCD, ecc.).
- Le modifiche alla configurazione al volo vengono nuovamente controllate ed elaborate prima che inizi la posizione verticale 0. I precedenti aggiornamenti del display lo hanno spostato alla riga 1 o successiva, a seconda della modalità. Questo potrebbe aver causato effetti collaterali imprevisti.
- La soppressione verticale cablata non funzionava correttamente se OCS Denise era configurato.
- Rimossa l'opzione chipset avanzata OCS Denise H-blank bug. Ora è sempre abilitato (se OCS Denise è configurato) ma la riga superiore e inferiore "buggy" è visibile solo se la modalità di overscan è Overscan+ o Extreme.
- Il passaggio da un'altra configurazione a/da una configurazione ECS Agnus 512k/512k in cui Agnus vede 1 M di RAM del chip (Agnus vede la metà superiore della RAM del chip al solito indirizzo $ 800000 ma la CPU lo vede a $ c00000) non ha sempre cambiato la configurazione correttamente. Ad esempio, il caricamento di un file di stato che utilizza la configurazione ECS 512k/512k quando la configurazione corrente è OCS 512k/512k, non ha cambiato la configurazione correttamente. (Insetto molto vecchio)
- ECS Denise + EXTHBLANK=1: il blanking verticale (solo display blanking) è completamente disabilitato.
- Nuova funzionalità non documentata: i bit 3 e 11 DIGHIGH sono bit 11 di avvio/arresto verticale in ECS Agnus. AGA li sostituisce con bit H0 orizzontali. Non è documentato nel capitolo HRM ECS li documenta, ufficialmente il bit V10 è il più alto (e anche V10 è quasi totalmente inutile). VPOSR/W V11 non esiste e il contatore verticale è solo 11 bit (da 0 a 10) il che rende la funzione DIWHIGH V11 che non ha senso.
- La correzione del timing CIA/CPU in b21 è stata parzialmente interrotta.
- Regolazioni di inizio/fine calcolo visualizzazione verticale in modalità programmata.
- L'emulazione del conflitto dello slot di aggiornamento del bitplane era "troppo casuale". Il comportamento interno è ancora sconosciuto. (Prima demo / corruzione Starline se ECS)
- La scrittura INTREQ che cancella gli interrupt non ha utilizzato il percorso del codice accurato (ritardato) del ciclo. (La Strana / Grotta)
- L'avvio orizzontale dell'interruzione Vblank non è stato adattato alla nuova emulazione del chipset personalizzato (Spectre Party / Phenomena e altri)
- VHPOSR non è stato adattato alla nuova emulazione del chipset (hpos=0 legge la linea verticale precedente)
- La scrittura NVRAM CD32 che si avvolge ha causato l'aumento delle dimensioni del file NVRAM.

Beta 33:
- DMACONR blitter busy bit state is 1 cycle later than copper waking up from blitter finished. (Circle Scroller / United Force)
- Direct3D9 mode crash was possible when switching screen modes (b32).
- Disassembler configuration (upper/lower case options, show calculated EA, show data pointed by EA, condition true/false), hex number prefix, min and max number of opcode/opwords. Currently only available via direct ini or registry editing, first enter debugger, then quit emulator to create default entries. Debugger sub section, debug_disasm_flags is bit mask, bits 0 to 4 are lower case bits (0=instruction name, 1=registers, 2=hex values, 3=instruction size), 4=show T/F, 5=show EA, 6=show EA contents, 7=show instruction opcode/opwords. Currently they only affect disassembler output. Defaults changed to lower case.
- Don't log flood "DMAL error" messages if (totally unusable) programmed mode with HTOTAL smaller than last audio DMA slot.
- DMAL (Serial DMA slot allocation information from Paula to Agnus) start cycle was not updated to match new custom chipset emulation.
- Small audio period causing repeated samples is now fully accurate, including 1 extra cycle delay if DMA request includes pointer reset (sample restart).
- Very strange programmed modes could have made it impossible to quit emulator normally.
- Adjusted behavior of CPU reads from write-only custom registers (Bozebobs / Area08)
- Fixed crash when loading some old A500 statefiles with CD32 CD incorrectly enabled.
- Adjusted "Smooth Copper" hack to work with new custom chipset emulation (not fully correct yet).
- Console log/debugger DPI adjustment.

Beta 34:
- Harmnless bug causing "Negative nr_color_changes.. " log messages fixed.
- Copper VBLANK startup was 2 cycles too early. (Previous fix was not correct)
- Partially reverted b9 sound update that caused worse sound stability on some systems. It also makes FPS value slightly less stable.
- Audio volume (from AUDxVOL) is only loaded to internal volume register when period counter is loaded. Volume changes during period counting don't affect audio until next period load.
- Copper writes to AUDxDAT in non-cycle exact modes had inaccurate timing.
- AUDxDAT undocumented feature: AUDxDAT write has 1 cycle delay, state machine==3 INTREQ test is done when period counter==1, not when it is zero. (Thanks to ross again, another weird test set )
- RTG screen was not fully cleared in some situations when switching modes (b25)
- Changed debugger "dp" to "dppc" (switch to PPC disassembly mode)
- Ateo Pixel 64 RTG board emulation. Another Cirrus Logic based RTG board. Very quickly done, only works with recent Picasso96 versions, does not work with drivers that need ateobus.library (will be done if someone disassembles it, I am too lazy, as usual). 256 color mode has wrong colors and right edge wraps around. Does not autoswitch.
- "Smooth Copper" works correctly again

Beta 35:
- Adjusted 68000 IPL sampling timing. (Spectre Party / Phenomena, F1GP by MicroValue. Not Microprose!)
- Blizzard PPC: if RESET m68k instruction executed, apparently board logic also forces external CPU reset.
- Fixed GDI handle leak (GUI panel change always leaked 2 font handles)
- Updated GUI tab order.
- If emulator was started by selecting statefile and GUI was opened after starting emulation, every time GUI Misc panel was opened, selected statefile was set to reload when GUI exited. (b31?)

Beta 36:
- Lores Display panel resolution mode: horizontal DIW values had wrong masking, bitplane left/right edge missed 1 pixel column or had 1 pixel column too much. (b29)
- 68000 IPL timing adjustment, IPL copy seems to be done when CPU is going to do read/write data during second part of memory cycle if followed by prefetch memory access. Previously it was after memory access which seems to be too late. (Made In Croatia / Binary)
- Horizontal mid screen HAM mode enable/disable combined with resolution change didn't anymore work correctly (Runaway / 2000AD, "Use joystick to move scroller!!" part)
- Fixed "box art" window image filehandle leak.
- Warp mode was much slower in Direct3D 9 compared to Direct3D 11.
- Don't emulate chipset emulation interrupt delays if not approximate/more compatible CPU speed. Delays are far too large in fast modes where chipset/chip ram accesses have unrestricted speeds. Fixes random hangs when formatting/writing to floppies.

Beta 37:
- "Copper wake up" (W) and "Copper wanted this cycle but couldn't get it" (c) markers in DMA debugger had disappeared. Skip also shows 'W' if SKIP skipped.
- Do not allow cycle-exact blitter without at least memory cycle-exact CPU. It is not anymore compatible with faster modes.
- Fixed random corruption when cycle-exact blitter was enabled and CPU was (memory) cycle-exact and CPU config was fast.
- Do not allow opposite joystick directions at the same time (some games crash..) if mapped using Game Ports panel. It is still allowed if configured using Input panel and it was mapped to left/right/up/down events (not horiz/vert).
- Added official WinUAE FloppyBridge support.
- Added basic floppy type selection to Quickstart panel (3.5" DD, 3.5" HD and FloppyBridge). Selection is not remembered yet.

FloppyBridge details:
- https://amiga.robsmithdev.co.uk/winuae
- DLLs go to <winuae path>/plugins
- Simple and flexible UI implementation. Different than in unofficial WinUAE floppybridge versions.
- Drive type select menus have "Configure Floppybridge" option if floppybridge DLL is detected. Selecting the option opens floppybridge configuration UI (which is located in floppybridge DLL, it is not part of WinUAE UI), use it configure one or more drive profiles. Select profile to enable floppybridge mode for selected emulated drive.
Almost complete. Official release date will be somewhere between last half of november - first half of december.

Beta 38:
- b33 audio update missed one condition, when DMA sample playback ended, last sample was played twice before audio channel entered idle state.
- FloppyBridge HD support fix. Fixed unreliable "turbo" writing and unreliable "?" button boot and root block reads.
- Quickstart floppy drive type is now remembered.
- Internal display buffer allocation was too small if image width was not divisible by 8. Could have caused crashes in some windowed mode configurations, for example when saving screenshots (very old bug).
- Screenshot height was always total internal size, even if it was partically blanked. (OCS Denise and mode was not Overscan+ or higher)
- OCS Denise last line "bug" was only visible in short field modes.
- Virtual mouse driver enabled, load new config that does not use virtual mouse: possible crash when restarting emulation.
- Fixed weird blitter behavior in some 68020+ memory cycle-exact modes if blitter nasty was also set.
- Fixed "Remove interlace artifact" display corruption in some programmed modes introduced in earlier betas. (Copper was partially enabled during "scandoubled" line processing).

Beta 39:
- Executable as a disk image mounting now supports FFS and HD disks. Uses DD+OFS if selected file fits (like previously), then DD+FFS, finally HD+FFS (if drive is HD).
- Fixed empty formatted standard HD ADF creation, broken in 4.3.0 (bitmap block used DD size)
- If A1200 config had PCMCIA emulation and 4M or larger Z2 RAM enabled, end of Z2 RAM didn't have "safety barrier" which caused long or word access that crosses end of RAM to crash the emulator.
- Some audio debugging was accidentally left enabled in b38
- Adjusted UAE Boot ROM variable locations, freeing more space for ROM code.
- UAE Boot ROM level 2 interrupt server priority changed to -1 if KS 1.x, workaround for old SoundTracker (and clones) broken keyboard handling that breaks completely if KS ROM level 2 interrupt server isn't first in chain.
- Fixed last line of bitmap missing or flickering if very tall interlace mode and interlace artifact removal was enabled.
- Blitter line mode didn't clear BLTZERO if line pixel was skipped because of onedot mode. (vAmiga test case)
- Blitter line mode didn't update global state of shift values and SIGN bit. (vAmiga test case where next blit is started without updating BLTCON0/1)
- Yet another small interrupt timing adjustment.
- Chipset emulation could get confused in non-ce configurations when BPL1DAT was modified with a copper.
- Reinitialize all selected FloppyBridges when exiting FloppyBridge UI.
- Change to memory card (CF/SD/etc) added as a harddrive: if you wanted to use same config with Amiga formatted cards and FAT formatted cards and Windows/driver allowed direct access even when FAT formatted card (without partition table) was inserted (oddly enough Windows 10 and older didn't allow it on my PC but after updating to Windows 11, direct access is possible), FAT card wasn't anymore mounted as a directory drive after re-insert because direct access has priority and it did succeed. Now direct harddrive mode is only used if drive does not have any PC partitions (no drive letter) or if Lock option is ticked.
- Experimental HDR support added. (This is not going to be fully implemented in next official release, it is only side project)

HDR mode details:
- Requirements: HDR capable monitor. Windows HDR mode enabled. Direct 3D 11.
- New Graphics API option: "Direct3D 11 HDR".
- Original 8-bit RGB values are converted to HDR color space using shaders.
- Brightness/contrast adjustments are now done in shader code which prevents usual SDR black crush or white clipping. (Work more like CRT). Gamma adjustment is not yet supported.
- "Blacker than black" option behavior is also changed, because HDR by design support blacker than SDR black, it does not need to affect normal color range like in SDR mode. It is also always enabled in HDR mode.

Beta 40:

- A2065 emulation quit/reset crash fix, A2065 RAM was freed too early, when it was still possible to receive new ethernet frames.
- Blitter final D write does not happen if D channel gets disabled, line mode gets enabled or new blit starts before pending D write has finished. This mainly affects copper blitter wait bug behavior, if new blit is setup before blitter gets its last cycle, last D write never happens which can prevent the glitch from happening. (Last write getting skipped might not cause any visible glitches) Fixes Andy & Blondie / Finity second to last part's glitch. Note that final part has many glitches, happens also on real A500 if system does not have any real Fast RAM.
- Log warning message if BLTDPTx is written to while blitter final D write is still pending.
- Removed wrong INTENA write optimization. Fixes Expiration / Mayhem cube corruption. (Problem wasn't directly blitter related)
- If programmed mode was in use that didn't require configured VSSTRT/VSSTOP registers, display was blank. (Contactro / Illusion)
- Screen mode with even horizontal cycle length (programmed and normal NTSC mode) copper timing fix. Copper can use cycle 0 (previously incorrectly calculated as cycle $e0) if previous line's last cycle was odd cycle (even total length). (Contactro / Illusion)
- Programmed mode registers are again zeroed at startup (was all ones) because JtxRules / Illusion only sets VBSTOP and HBSTOP and expects zeroed HBSTRT and VBSTRT. (Programmed mode comparators don't have reset line connected but they still power up with zeroed contents. At least usually..)
This update fixes remaining chipset related issues in my "should be fixed before official release" list.

Beta 41 (RC2):
- Sprite processing was exited early if sprite horizontal start was zero (which is correct normally). But when combined with FMODE SSCAN2-bit, only "original" sprite is invisible but "doubled" sprite is still visible. Fixes Fantastic Dizzy CD32 background glitch.
- Improve Denise/Lisa internal bitplane pipeline logic, previously undocumented combined plane change + bitplane shift changes mid scanline are now working correctly.
- Above behavior also revealed yet another undocumented chipset feature/bug: if ECS Denise or AGA and bitplane plane count is lowered mid scan line and disabled plane's last bit out of bitplane shifter was one: last pixel appears twice. OCS Denise is unaffected. This is emulated only in subpixel mode.
- Clear all internal display emulation buffers at reset, previously some of them was not cleared. (Possibly could have caused temporary on screen garbage when loading statefile on the fly)
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
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Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
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Re: WinUAE v4.9.0 Beta 32 32/64 Bit

Messaggioda AMIGASYSTEM » sab set 11, 2021 1:56 pm

Aggiornata la news alla Beta 33 !
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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Re: WinUAE v4.9.0 Beta 33 32/64 Bit

Messaggioda AMIGASYSTEM » lun set 13, 2021 8:16 am

Aggiornata la news alla Beta 34 !
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
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Re: WinUAE v4.9.0 Beta 34 32/64 Bit

Messaggioda AMIGASYSTEM » dom set 26, 2021 7:53 pm

Aggiornata la news alla Beta 35/36
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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Re: WinUAE v4.9.0 Beta 35 32/64 Bit

Messaggioda AMIGASYSTEM » mer set 29, 2021 9:09 am

Aggiornata la News alla Beta 37/38/
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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Re: WinUAE v4.9.0 Beta 36 32/64 Bit

Messaggioda AMIGASYSTEM » mer ott 06, 2021 8:42 am

Aggiornata la News alla Beta 39/40
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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Re: WinUAE v4.9.0 Beta 38 32/64 Bit

Messaggioda AMIGASYSTEM » mar nov 23, 2021 1:27 am

Aggiornata la News alla Beta 41 (RC2)
Immagine - AROS One Home Site - AfA One - AROS One x86 - AROS One 68K - WinUAE OS 4.1 -

Miei AMIGA
Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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