Fastcache040+ v1.9

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Fastcache040+ v1.9

Messaggioda AMIGASYSTEM » lun mag 21, 2018 8:36 pm


Uscita oggi una nuova versione di FastCache che aggiunge e corregge alcuni problemi:

Fixed "D2 Register Not Preserved" coding bug in PreDMA.
Most DMA drivers don't seem to need it preserved but
Thanks to Cosmos for reporting it anyway. Moved PostDMA
Nest count code to user section of code. This eliminates
any calls to Supervisor when the count is more than 1.
v1.9BR Added new "Experimental" code which should allow only
DMA targeted 16MB blocks of Fast RAM to change to Write
Through mode. This "In Theory" allows the other 16MB
blocks to remain in Copyback mode. This can only benefit
"Big RAM" systems with 32MB+ of Fast RAM and ONLY when
these systems run apps which use the extra Fast RAM.
WARNING: Use at you own risk!

v1.0 - First release
v1.1 - Fixed address and size bugs in FC loop code which
could have affected the results.

Fastcache040+ v1.9: Download
Fastcache040+ v1.9BR: Download
Fixmapp v5.12: Download
Cachedmabench v1.1: Download

FastCache040+ is a patch to replace the CachePreDMA() and CachePostDMA() functions of most 68040/060 libraries. While the old functions are adequate they are far from optimal. These old functions have 3x more code then the new ones provided with this patch!

Also, the new functions implement a much more efficient method of managing the Copyback cache for DMA. While every system will have some CPU performance loss under DMA conditions, the new functions keep this performance loss to a bare minimum. FixMapP5 is a tool to modify some of the default MMU mapping of the Phase5 68040 and 68060 libraries. This can improve stability and prevent crashing under the following conditions:

- Hardware or software interrupts which occur during a Chip RAM access by the 68060 (In particular when Store buffer is enabled).
- Software bugs which allow illegal writes to the $F80000 Standard Kickstart ROM for both 68040 and 68060 libraries.

- Changes Chip RAM mode to Precise (68060 only)
- Changes Standard ROM cache to Writethrough (68040 or 68060)
- Uses 68040/060 library detection code
- 100% Assembler code

- Amiga with 68040 or 68060 CPU and MMU
- Phase5 68040.library or 68060.library

This tool was developed ONLY for use with the Phase5 libraries but
it does NOT actually verify such usage. So it can and probably
will mess up the mapping of ANY other libraries!


Thanks to Michael Sinz for his freely distributable MMU handler.
Immagine - AFA OS 060 - AFA OS 040 - AFA OS PPC - AROS x86 - AROS 68K - WinUAE OS 4.1 -

Amiga 4000/Cyberstorm MK II/060/Picasso RAM 6MB Kick 3.1
Amiga 1200/030 Ram 16 Mega HD 500 MB
Amiga 1200/040 Ram 32 Mega HD 500 MB
Amiga 600 HD 20 MB
Amiga 600 Doppio Kickstart 2.05-1.3
Amiga 500 Plus Doppio Kickstart 204-1.3
Amiga 500
CD32/SX-32 MK1 RAM 8 MB HD 4G
CD32 Standard
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