Autore: Toni WilenAggiornata la news alla Beta 6 : Possibile versione finale 4.9.1.WinUAE: Nuova serie di beta del più famoso Emulatore Amiga e base tutti gli altri Emulatori Amiga.
Queste nuove release fixano e aggiungono nuove funzioni:
http://eab.abime.net/showpost.php?p=152 ... tcount=126Beta 1:Quick few days long beta series. JIT bug can be very annoying (it triggering depends on used software) when using emulated RTG boards. I think it is better to release fix before I break chipset emulation again, hopefully this time it only takes few months..
4.9.0 bugs fixed:
- JIT indirect safe mode MOVEM.W from memory didn't sign extend registers (very, very old bug but apparently it was almost invisible until now because previously indirect MOVEM wasn't used unless VRAM wasn't indirect capable and direct MOVEM was still incorrectly used even when indirect mode was enabled. This was fixed in 4.9.0).
- Really force all emulated gfx board VRAM accesses to use indirect JIT. Previously used method still allowed direct JIT if code first accessed plain RAM and later (after it was translated) same code accessed VRAM. Fixes graphics corruption in some situations when JIT mode is direct and using emulated RTG boards. Only uaegfx is always fully JIT direct compatible.
- JIT MOVEM.x <regs>,-(An) and <regs> includes An: use MOVEM indirect safe mode. Tester does not complain anymore.
- PCem RTG board 15 and 16-bit lores modes didn't horizontally double correctly.
- HBSTRT very near end of scanline was detected as missed, opening left border.
- Programmed HBLANK end mid screen + bitplanes active (=totally broken situation) caused random graphics corruption.
- ECS Denise horizontal blanking logic updated, it is quite complex and previous was not complete. Note that in real world it can only work if display uses H/V sync (not composite sync) = VGA monitor. CSYNC vs HSYNC/VSYNC "monitor cable" option will be added later.
- Programmed Denise/Lisa side vertical blank ended 1 line too early. It takes 1 more line before Denise/Lisa ends it.
- Programmed vertical blank generated blank scanline wasn't always drawn fully to end of scanline.
Other updates and earlier version bug fixes:
- If warp mode and non-qualifier key is pressed: send release event immediately. It is now possible to type normally in warp mode. Note that physical key release will generate another, almost always harmless, key release event.
- PCem Cirrus Logic SVGA emulation planar support enabled. Picasso96 supports 4bit/16 color planar mode.
- Hardware emulated RTG mode + horizontal or vertical doubling + magic mouse: mouse position calculation incorrectly used doubled coordinates.
- Only process mouse/keyboad input Windows events during mid frame (used to reduce input lag) and process other events during vblank.
Beta 2:http://download.abime.net/winuae/files/ ... _4910b2.7zhttp://download.abime.net/winuae/files/ ... _4910b2.7z- Adjusted programmed mode size/position calculation.
- Adjusted copper emulation, waits for too large horizontal position woke up normally.
- Delay warp mode automatic key release by few frames, some programs might not like immediate keypress/release pair.
- Windows event processing change fix.
- Border "bug" emulated (ECS Denise and AGA, does not affect OCS Denise). If bitplane DMA (BPL1DAT) happens inside VBLANK, border state gets disabled, when first non-VB line starts, line stripe from HDIW start to first BPL1DAT is still in "not border" state: sprites are visible and borderblank does not affect it. This happens because border state normally gets enabled when HBLANK goes from inactive to active state but it looks like HBLANK does not affect border state inside VBLANK. It can also happen during later scanlines if programmed HBLANK starts too early, before last BPL1DAT access. (HBLANK enables border, BPL1DAT access disables it again).